The present invention relates to semiconductor integrated circuit devices, and more particularly to a sense amplifier for use in a semiconductor memory device.
To increase the integration degree of semiconductor memory devices, the size of individual memory cells must be decreased. Such a reduction in memory cell size inevitably results in a reduction in memory cell current. For semiconductor memory devices intended for use in portable electronic equipment which operates at low voltages, the memory cell current required for sensing data is reduced even further because the devices operate at very low voltages.
However, when the current through a semiconductor memory cell is decreased, the speed of a sense amplifier which is used to sense the state of the memory cell decreases in proportion to the decrease in the memory cell current. As a result, the operating speed of the semiconductor memory device is reduced.
Generally, a conventional sense amplifier has been implemented using a differential amplifier, which senses and amplifies a voltage difference between two input signals. The differential amplifier includes two input transistors, a current sinker (composed of a MOS transistor) coupled in series with input transistors, and a current mirror. To a first input transistor, a sense voltage is provided as an input signal. The sense voltage is determined by a cell current flowing through the memory cell. To the other input transistor, a reference voltage is provided as the other input signal. The reference voltage is determined by a reference current, which is typically generated by a reference cell.
When the differential amplifier is used as a sense amplifier, although a difference between the reference and sense voltages exists, the input transistor is turned on when its input voltage (the sense or reference voltage) is higher than its threshold voltage. That is, although a difference between the reference and sense voltages exists, the input transistors continue to be turned off utile the input voltage of the input transistor is higher than its threshold voltage. Furthermore, the threshold voltage of the respective input transistors is increased because the input transistors are coupled in series to the current sinker. Also, the speed of the conventional sense amplifier can be increased by increasing the difference between the reference voltage and the sense voltage.
According to the above-described condition, however, there is operational delay until a sufficient voltage difference develops in the sense amplifier. Thus, it is difficult to achieve a stable, but speedy operation of the conventional sense amplifier. This delay hampers prior art sense amplifiers because of a decrease in sensing speed thereof. Furthermore, as the integration degree is increased (causing an increment of a bit line loading) and the power supply voltage is lowered, such a problem becomes more serious.
It is, therefore, an object of the present invention to provide a sense amplifier for use in a semiconductor memory device capable of securing a stable, speedy sensing operation despite increases in degree of integration and decreases in power supply voltages, thereby to increase the operational speed of the device.
In order to attain the above objects, according to an aspect of the present invention, a novel sense amplifier is provided for use in a semiconductor memory device. The sense amplifier comprises a reference voltage generator, a sense voltage generator, and an inverter. The reference voltage generator produces a reference voltage at a reference node, and the sense voltage generator produces a sense voltage at a sense node in response to the state of a memory cell. The inverter is coupled to the sense node, and when the sense voltage is higher than a predetermined trip voltage of the inverter, the inverter outputs a logic low or high signal.